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ARM Generic Interrupt Controller (GIC) version 2. More...
#include <ARMGenericInterrupt.h>
Public Member Functions | |
ARMGenericInterrupt (Address distRegisterBase, Address cpuRegisterBase) | |
Constructor. More... | |
Result | initialize (bool performReset=true) |
Initialize the controller. More... | |
virtual Result | send (const uint targetCoreId, const uint irq) |
Raise a software generated interrupt (SGI). More... | |
virtual Result | enable (uint irq) |
Enable hardware interrupt (IRQ). More... | |
virtual Result | disable (uint irq) |
Disable hardware interrupt (IRQ). More... | |
virtual Result | clear (uint irq) |
Clear hardware interrupt (IRQ). More... | |
virtual Result | nextPending (uint &irq) |
Retrieve the next pending interrupt (IRQ). More... | |
virtual bool | isTriggered (uint irq) |
Check if an IRQ vector is set. More... | |
Public Member Functions inherited from IntController | |
IntController () | |
Constructor. More... | |
uint | getBase () const |
Get interrupt number base offset. More... | |
Private Types | |
enum | DistRegisters { GICD_CTRL = 0x0000, GICD_TYPER = 0x0004, GICD_GROUPR = 0x0080, GICD_ISENABLER = 0x0100, GICD_ICENABLER = 0x0180, GICD_ICPENDR = 0x0280, GICD_ISACTIVER = 0x0300, GICD_ICACTIVER = 0x0380, GICD_IPRIORITYR = 0x0400, GICD_ITARGETSR = 0x0800, GICD_ICFGR = 0x0C00, GICD_SGIR = 0x0F00, GICD_CPENDSGIR = 0x0F10, GICD_ID2 = 0x0FE8 } |
Distributor register interface. More... | |
enum | DistCtrlFlags { DistCtrlGroup0 = (1 << 0), DistCtrlGroup1 = (1 << 1) } |
enum | DistTypeFlags { DistTypeIrqsMask = (0xf) } |
enum | CpuRegisters { GICC_CTRL = 0x0000, GICC_PMR = 0x0004, GICC_IAR = 0x000C, GICC_EOIR = 0x0010, GICC_IDR = 0x00FC, GICC_DIR = 0x1000 } |
CPU register interface. More... | |
enum | CpuCtrlFlags { CpuCtrlGroup0 = (1 << 0), CpuCtrlGroup1 = (1 << 1) } |
enum | CpuIrqAckFlags { CpuIrqAckMask = (0x3ff) } |
Private Member Functions | |
Size | numRegisters (Size bits) const |
Calculate the number of 32-bit registers needed to represent given number of bits per IRQ. More... | |
bool | isSoftwareInterrupt (const uint irq) const |
Check if the given IRQ is an SGI. More... | |
Private Attributes | |
ARMIO | m_dist |
ARM Generic Interrupt Controller Distributor Interface. More... | |
ARMIO | m_cpu |
ARM Generic Interrupt Controller CPU Interface. More... | |
Size | m_numIrqs |
Number of interrupts supported. More... | |
u32 | m_savedIrqAck |
Saved value of the Interrupt-Acknowledge register. More... | |
Static Private Attributes | |
static const Size | NumberOfSoftwareInterrupts = 16 |
Total number of software generated interrupts (SGI) More... | |
Additional Inherited Members | |
Public Types inherited from IntController | |
enum | Result { Success, InvalidIRQ, InvalidFrequency, IOError, NotFound } |
Result codes. More... | |
Protected Attributes inherited from IntController | |
uint | m_base |
Interrupt number base offset. More... | |
ARM Generic Interrupt Controller (GIC) version 2.
Definition at line 38 of file ARMGenericInterrupt.h.
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Enumerator | |
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CpuCtrlGroup0 | |
CpuCtrlGroup1 |
Definition at line 90 of file ARMGenericInterrupt.h.
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Enumerator | |
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CpuIrqAckMask |
Definition at line 96 of file ARMGenericInterrupt.h.
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CPU register interface.
Enumerator | |
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GICC_CTRL | |
GICC_PMR | |
GICC_IAR | |
GICC_EOIR | |
GICC_IDR | |
GICC_DIR |
Definition at line 80 of file ARMGenericInterrupt.h.
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Enumerator | |
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DistCtrlGroup0 | |
DistCtrlGroup1 |
Definition at line 66 of file ARMGenericInterrupt.h.
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Distributor register interface.
Enumerator | |
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GICD_CTRL | |
GICD_TYPER | |
GICD_GROUPR | |
GICD_ISENABLER | |
GICD_ICENABLER | |
GICD_ICPENDR | |
GICD_ISACTIVER | |
GICD_ICACTIVER | |
GICD_IPRIORITYR | |
GICD_ITARGETSR | |
GICD_ICFGR | |
GICD_SGIR | |
GICD_CPENDSGIR | |
GICD_ID2 |
Definition at line 48 of file ARMGenericInterrupt.h.
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Enumerator | |
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DistTypeIrqsMask |
Definition at line 72 of file ARMGenericInterrupt.h.
Constructor.
distRegisterBase | GIC distributor register base offset |
cpuRegisterBase | GIC CPU register base offset |
Definition at line 21 of file ARMGenericInterrupt.cpp.
References DistTypeIrqsMask, GICD_TYPER, m_cpu, m_dist, m_numIrqs, NOTICE, ARMIO::read(), and IO::setBase().
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Clear hardware interrupt (IRQ).
Clearing marks the end of an interrupt service routine and causes the controller to trigger the interrupt again on the next trigger moment.
irq | Interrupt Request number to clear. |
Implements IntController.
Definition at line 102 of file ARMGenericInterrupt.cpp.
References GICC_DIR, GICC_EOIR, GICD_CPENDSGIR, isSoftwareInterrupt(), m_cpu, m_dist, m_savedIrqAck, ARMIO::read(), IntController::Success, and ARMIO::write().
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Disable hardware interrupt (IRQ).
irq | Interrupt Request number. |
Implements IntController.
Definition at line 93 of file ARMGenericInterrupt.cpp.
References GICD_ICENABLER, isSoftwareInterrupt(), m_dist, ARMIO::set(), and IntController::Success.
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virtual |
Enable hardware interrupt (IRQ).
irq | Interrupt Request number. |
Implements IntController.
Definition at line 84 of file ARMGenericInterrupt.cpp.
References GICD_ISENABLER, isSoftwareInterrupt(), m_dist, ARMIO::set(), and IntController::Success.
ARMGenericInterrupt::Result ARMGenericInterrupt::initialize | ( | bool | performReset = true | ) |
Initialize the controller.
performReset | If true resets the controller with all IRQs disabled. |
Definition at line 35 of file ARMGenericInterrupt.cpp.
References CpuCtrlGroup0, CpuCtrlGroup1, DistCtrlGroup0, DistCtrlGroup1, GICC_CTRL, GICC_PMR, GICD_CTRL, GICD_GROUPR, GICD_ICENABLER, GICD_ICFGR, GICD_IPRIORITYR, GICD_ITARGETSR, m_cpu, m_dist, m_numIrqs, numRegisters(), IntController::Success, and ARMIO::write().
Referenced by SunxiKernel::SunxiKernel().
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Check if the given IRQ is an SGI.
Definition at line 145 of file ARMGenericInterrupt.cpp.
References NumberOfSoftwareInterrupts.
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Check if an IRQ vector is set.
irq | Interrupt number |
Reimplemented from IntController.
Definition at line 131 of file ARMGenericInterrupt.cpp.
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Retrieve the next pending interrupt (IRQ).
irq | Outputs the next pending interrupt on Success |
Reimplemented from IntController.
Definition at line 116 of file ARMGenericInterrupt.cpp.
References CpuIrqAckMask, GICC_IAR, m_cpu, m_savedIrqAck, IntController::NotFound, ARMIO::read(), and IntController::Success.
Calculate the number of 32-bit registers needed to represent given number of bits per IRQ.
bits | Bits needed per IRQ |
Definition at line 137 of file ARMGenericInterrupt.cpp.
References m_numIrqs.
Referenced by initialize().
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Raise a software generated interrupt (SGI).
targetCoreId | Target processor that will receive the interrupt |
irq | Interrupt number for the software interrupt |
Reimplemented from IntController.
Definition at line 77 of file ARMGenericInterrupt.cpp.
References GICD_SGIR, m_dist, IntController::Success, and ARMIO::write().
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ARM Generic Interrupt Controller CPU Interface.
Definition at line 204 of file ARMGenericInterrupt.h.
Referenced by ARMGenericInterrupt(), clear(), initialize(), and nextPending().
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ARM Generic Interrupt Controller Distributor Interface.
Definition at line 201 of file ARMGenericInterrupt.h.
Referenced by ARMGenericInterrupt(), clear(), disable(), enable(), initialize(), and send().
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Number of interrupts supported.
Definition at line 207 of file ARMGenericInterrupt.h.
Referenced by ARMGenericInterrupt(), initialize(), and numRegisters().
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Saved value of the Interrupt-Acknowledge register.
Definition at line 210 of file ARMGenericInterrupt.h.
Referenced by clear(), and nextPending().
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Total number of software generated interrupts (SGI)
Definition at line 43 of file ARMGenericInterrupt.h.
Referenced by isSoftwareInterrupt().