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ARMGenericInterrupt Class Reference

ARM Generic Interrupt Controller (GIC) version 2. More...

#include <ARMGenericInterrupt.h>

Inheritance diagram for ARMGenericInterrupt:
IntController

Public Member Functions

 ARMGenericInterrupt (Address distRegisterBase, Address cpuRegisterBase)
 Constructor. More...
 
Result initialize (bool performReset=true)
 Initialize the controller. More...
 
virtual Result send (const uint targetCoreId, const uint irq)
 Raise a software generated interrupt (SGI). More...
 
virtual Result enable (uint irq)
 Enable hardware interrupt (IRQ). More...
 
virtual Result disable (uint irq)
 Disable hardware interrupt (IRQ). More...
 
virtual Result clear (uint irq)
 Clear hardware interrupt (IRQ). More...
 
virtual Result nextPending (uint &irq)
 Retrieve the next pending interrupt (IRQ). More...
 
virtual bool isTriggered (uint irq)
 Check if an IRQ vector is set. More...
 
- Public Member Functions inherited from IntController
 IntController ()
 Constructor. More...
 
uint getBase () const
 Get interrupt number base offset. More...
 

Private Types

enum  DistRegisters {
  GICD_CTRL = 0x0000, GICD_TYPER = 0x0004, GICD_GROUPR = 0x0080, GICD_ISENABLER = 0x0100,
  GICD_ICENABLER = 0x0180, GICD_ICPENDR = 0x0280, GICD_ISACTIVER = 0x0300, GICD_ICACTIVER = 0x0380,
  GICD_IPRIORITYR = 0x0400, GICD_ITARGETSR = 0x0800, GICD_ICFGR = 0x0C00, GICD_SGIR = 0x0F00,
  GICD_CPENDSGIR = 0x0F10, GICD_ID2 = 0x0FE8
}
 Distributor register interface. More...
 
enum  DistCtrlFlags { DistCtrlGroup0 = (1 << 0), DistCtrlGroup1 = (1 << 1) }
 
enum  DistTypeFlags { DistTypeIrqsMask = (0xf) }
 
enum  CpuRegisters {
  GICC_CTRL = 0x0000, GICC_PMR = 0x0004, GICC_IAR = 0x000C, GICC_EOIR = 0x0010,
  GICC_IDR = 0x00FC, GICC_DIR = 0x1000
}
 CPU register interface. More...
 
enum  CpuCtrlFlags { CpuCtrlGroup0 = (1 << 0), CpuCtrlGroup1 = (1 << 1) }
 
enum  CpuIrqAckFlags { CpuIrqAckMask = (0x3ff) }
 

Private Member Functions

Size numRegisters (Size bits) const
 Calculate the number of 32-bit registers needed to represent given number of bits per IRQ. More...
 
bool isSoftwareInterrupt (const uint irq) const
 Check if the given IRQ is an SGI. More...
 

Private Attributes

ARMIO m_dist
 ARM Generic Interrupt Controller Distributor Interface. More...
 
ARMIO m_cpu
 ARM Generic Interrupt Controller CPU Interface. More...
 
Size m_numIrqs
 Number of interrupts supported. More...
 
u32 m_savedIrqAck
 Saved value of the Interrupt-Acknowledge register. More...
 

Static Private Attributes

static const Size NumberOfSoftwareInterrupts = 16
 Total number of software generated interrupts (SGI) More...
 

Additional Inherited Members

- Public Types inherited from IntController
enum  Result {
  Success, InvalidIRQ, InvalidFrequency, IOError,
  NotFound
}
 Result codes. More...
 
- Protected Attributes inherited from IntController
uint m_base
 Interrupt number base offset. More...
 

Detailed Description

ARM Generic Interrupt Controller (GIC) version 2.

Definition at line 38 of file ARMGenericInterrupt.h.

Member Enumeration Documentation

◆ CpuCtrlFlags

Enumerator
CpuCtrlGroup0 
CpuCtrlGroup1 

Definition at line 90 of file ARMGenericInterrupt.h.

◆ CpuIrqAckFlags

Enumerator
CpuIrqAckMask 

Definition at line 96 of file ARMGenericInterrupt.h.

◆ CpuRegisters

CPU register interface.

Enumerator
GICC_CTRL 
GICC_PMR 
GICC_IAR 
GICC_EOIR 
GICC_IDR 
GICC_DIR 

Definition at line 80 of file ARMGenericInterrupt.h.

◆ DistCtrlFlags

Enumerator
DistCtrlGroup0 
DistCtrlGroup1 

Definition at line 66 of file ARMGenericInterrupt.h.

◆ DistRegisters

Distributor register interface.

Enumerator
GICD_CTRL 
GICD_TYPER 
GICD_GROUPR 
GICD_ISENABLER 
GICD_ICENABLER 
GICD_ICPENDR 
GICD_ISACTIVER 
GICD_ICACTIVER 
GICD_IPRIORITYR 
GICD_ITARGETSR 
GICD_ICFGR 
GICD_SGIR 
GICD_CPENDSGIR 
GICD_ID2 

Definition at line 48 of file ARMGenericInterrupt.h.

◆ DistTypeFlags

Enumerator
DistTypeIrqsMask 

Definition at line 72 of file ARMGenericInterrupt.h.

Constructor & Destructor Documentation

◆ ARMGenericInterrupt()

ARMGenericInterrupt::ARMGenericInterrupt ( Address  distRegisterBase,
Address  cpuRegisterBase 
)

Constructor.

Parameters
distRegisterBaseGIC distributor register base offset
cpuRegisterBaseGIC CPU register base offset

Definition at line 21 of file ARMGenericInterrupt.cpp.

References DistTypeIrqsMask, GICD_TYPER, m_cpu, m_dist, m_numIrqs, NOTICE, ARMIO::read(), and IO::setBase().

Member Function Documentation

◆ clear()

ARMGenericInterrupt::Result ARMGenericInterrupt::clear ( uint  irq)
virtual

Clear hardware interrupt (IRQ).

Clearing marks the end of an interrupt service routine and causes the controller to trigger the interrupt again on the next trigger moment.

Parameters
irqInterrupt Request number to clear.
Returns
Result code.

Implements IntController.

Definition at line 102 of file ARMGenericInterrupt.cpp.

References GICC_DIR, GICC_EOIR, GICD_CPENDSGIR, isSoftwareInterrupt(), m_cpu, m_dist, m_savedIrqAck, ARMIO::read(), IntController::Success, and ARMIO::write().

◆ disable()

ARMGenericInterrupt::Result ARMGenericInterrupt::disable ( uint  irq)
virtual

Disable hardware interrupt (IRQ).

Parameters
irqInterrupt Request number.
Returns
Result code.

Implements IntController.

Definition at line 93 of file ARMGenericInterrupt.cpp.

References GICD_ICENABLER, isSoftwareInterrupt(), m_dist, ARMIO::set(), and IntController::Success.

◆ enable()

ARMGenericInterrupt::Result ARMGenericInterrupt::enable ( uint  irq)
virtual

Enable hardware interrupt (IRQ).

Parameters
irqInterrupt Request number.
Returns
Result code.

Implements IntController.

Definition at line 84 of file ARMGenericInterrupt.cpp.

References GICD_ISENABLER, isSoftwareInterrupt(), m_dist, ARMIO::set(), and IntController::Success.

◆ initialize()

ARMGenericInterrupt::Result ARMGenericInterrupt::initialize ( bool  performReset = true)

Initialize the controller.

Parameters
performResetIf true resets the controller with all IRQs disabled.
Returns
Result code.

Definition at line 35 of file ARMGenericInterrupt.cpp.

References CpuCtrlGroup0, CpuCtrlGroup1, DistCtrlGroup0, DistCtrlGroup1, GICC_CTRL, GICC_PMR, GICD_CTRL, GICD_GROUPR, GICD_ICENABLER, GICD_ICFGR, GICD_IPRIORITYR, GICD_ITARGETSR, m_cpu, m_dist, m_numIrqs, numRegisters(), IntController::Success, and ARMIO::write().

Referenced by SunxiKernel::SunxiKernel().

◆ isSoftwareInterrupt()

bool ARMGenericInterrupt::isSoftwareInterrupt ( const uint  irq) const
private

Check if the given IRQ is an SGI.

Returns
True if the IRQ is a Software Generated Interrupt (SGI)

Definition at line 145 of file ARMGenericInterrupt.cpp.

References NumberOfSoftwareInterrupts.

Referenced by clear(), disable(), and enable().

◆ isTriggered()

bool ARMGenericInterrupt::isTriggered ( uint  irq)
virtual

Check if an IRQ vector is set.

Parameters
irqInterrupt number
Returns
True if triggered. False otherwise

Reimplemented from IntController.

Definition at line 131 of file ARMGenericInterrupt.cpp.

◆ nextPending()

ARMGenericInterrupt::Result ARMGenericInterrupt::nextPending ( uint irq)
virtual

Retrieve the next pending interrupt (IRQ).

Parameters
irqOutputs the next pending interrupt on Success
Returns
Result code.

Reimplemented from IntController.

Definition at line 116 of file ARMGenericInterrupt.cpp.

References CpuIrqAckMask, GICC_IAR, m_cpu, m_savedIrqAck, IntController::NotFound, ARMIO::read(), and IntController::Success.

◆ numRegisters()

Size ARMGenericInterrupt::numRegisters ( Size  bits) const
private

Calculate the number of 32-bit registers needed to represent given number of bits per IRQ.

Parameters
bitsBits needed per IRQ
Returns
Number of registers needed

Definition at line 137 of file ARMGenericInterrupt.cpp.

References m_numIrqs.

Referenced by initialize().

◆ send()

ARMGenericInterrupt::Result ARMGenericInterrupt::send ( const uint  targetCoreId,
const uint  irq 
)
virtual

Raise a software generated interrupt (SGI).

Parameters
targetCoreIdTarget processor that will receive the interrupt
irqInterrupt number for the software interrupt
Returns
Result code

Reimplemented from IntController.

Definition at line 77 of file ARMGenericInterrupt.cpp.

References GICD_SGIR, m_dist, IntController::Success, and ARMIO::write().

Field Documentation

◆ m_cpu

ARMIO ARMGenericInterrupt::m_cpu
private

ARM Generic Interrupt Controller CPU Interface.

Definition at line 204 of file ARMGenericInterrupt.h.

Referenced by ARMGenericInterrupt(), clear(), initialize(), and nextPending().

◆ m_dist

ARMIO ARMGenericInterrupt::m_dist
private

ARM Generic Interrupt Controller Distributor Interface.

Definition at line 201 of file ARMGenericInterrupt.h.

Referenced by ARMGenericInterrupt(), clear(), disable(), enable(), initialize(), and send().

◆ m_numIrqs

Size ARMGenericInterrupt::m_numIrqs
private

Number of interrupts supported.

Definition at line 207 of file ARMGenericInterrupt.h.

Referenced by ARMGenericInterrupt(), initialize(), and numRegisters().

◆ m_savedIrqAck

u32 ARMGenericInterrupt::m_savedIrqAck
private

Saved value of the Interrupt-Acknowledge register.

Definition at line 210 of file ARMGenericInterrupt.h.

Referenced by clear(), and nextPending().

◆ NumberOfSoftwareInterrupts

const Size ARMGenericInterrupt::NumberOfSoftwareInterrupts = 16
staticprivate

Total number of software generated interrupts (SGI)

Definition at line 43 of file ARMGenericInterrupt.h.

Referenced by isSoftwareInterrupt().


The documentation for this class was generated from the following files: